UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 43306

System Generator for DSP v13.1 - For DSP Macro v2.0/v2.1, when receiving Rates and Types there are issues when feedback loop incorporated

Description

Receiving errors similar to those shown below when running DSP48 Macro designs incorporating feedback from P output to C input.

Solution

This is a known issue and has been resolved in later versions of System Generator for DSP v13.1?

For System Generator for DSP Release Notes from other versions, see (Xilinx Answer 29595).
AR# 43306
Date Created 07/26/2011
Last Updated 01/16/2012
Status Active
Type General Article
Tools
  • System Generator for DSP - 13.1