This answer record highlights important requirements and known issues for the Kintex-7 FPGA Initial Engineering Sample (ES) program related to software and IP.
These items are specifically relevant to designs targeting the Kintex-7 325T and 480T Initial ES FPGA devices (CES 9937). Additional silicon limitations might exist, so please reference the 7 Series Errata found on xilinx.com.
This answer record will be updated as new information becomes available regarding known issues, patches, IP support, and more. Please check back often for the most current information.
Kintex-7 Initial ES FPGA can be used with ISE 13.4 design tools. The ISE 13.4 tools include some software and IP fixes, however, it is primarily targeted for General ES devices, so some additional settings are required.
Follow the steps listed below for your ISE tools version in the Software Requirements and IP Known Issues to start a design.
Software Known Issues
All 7 Series IP Cores are listed as Pre-Production in the CORE Generator "Status" field. Support of Pre-Production cores on Initial ES FPGA devices is dependent on Xilinx hardware validation, which is ongoing throughout the ES period. IP that has been hardware validated is still subject to change as verification and characterization work continues. Consult the IP Known Issues Answer Records below for the most recent information. The list below includes all Pre-Production IP cores that have been hardware validated on Initial ES at this time:
This list will be updated as hardware validation is completed. If there are further questions about hardware validation for a particular IP core, please contact a Field Application Engineer.
IP Known Issues for ISE Design Suite 13.4
Other Important Items
Bitstream Compatibility Between Initial ES vs. General ES Silicon
The Initial ES bitstream cannot be used with General ES silicon and vice versa.
|09/24/12||Minor update; no change to content|
|02/27/12||Updated software requirement due to MIG known issues|
|01/18/12||Updated for ISE 13.4 release|
|10/26/11||Updated for ISE 13.3 release|
|09/29/11||Consolidated all patches in one list in Software section|
|09/07/11||Added 43949 for PCIe.|
|08/22/11||Added QDRII+ and RLDRAMII to list of MIG validated IP|