UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 43371

AXI Bridge for PCI Express - Working Example Design for the ML605 Development Board

Description

The Base System Builder does not include the AXI bridge for PCI Express in EDK versions 13.2 and 13.3. This answer record provides the files necessary to set up a typical system.

Solution

The link below provides an ISE 13.2 EDK project as well as a pre-built bit file targeting the ML605:
http://www.xilinx.com/txpatches/pub/applications/pci/ar43371_ml605_axipcie.zip.

This project was built in ISE 13.2 software, however, it will migrate properly in 13.3.

Base System Builder will include the PCI Express Memory Mapped core in EDK 13.4.

Revision History
11/02/2011 - Updated for 13.3
08/25/2011 - Entire EDK Project and pre-built bit file provided
08/19/2011 - Initial Release


Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
44972 AXI Bridge for PCI Express FAQ N/A N/A
AR# 43371
Date Created 08/19/2011
Last Updated 12/15/2012
Status Active
Type General Article
IP
  • AXI PCI Express (PCIe)