We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome,
Internet Explorer 11,
Safari. Thank you!
VHDL libraries can be used to share data amongst XPS peripherals in a Xilinx MicroBlaze FGPA implementation. The same libraries can also be used with the test benches for individual peripherals. There are a number of files and directories in the implementation, and finding the right place to create and configure the libraries can be time-consuming for even experienced VHDL developers. This document explains a process that can be used to create a shared library that works in XPS and ISE for both synthesis and simulation.
We will use as an example the creation of a 'constants' package that will be placed in a library accessible by all project peripherals, as well as their associated test benches.
1. Decide where the shared library will be placed. - If the library is just to be shared amongst peripherals that are part of one processor project, it is best to use a path that is relative to each individual peripheral, but common to all the processor project peripherals.
One location is the pcores directory, as this is the first directory common to all peripherals in the project. - If the library is shared outside the processor project, an absolute location can be chosen from the file system. This may be less portable than copying a shared library into each project and using it as a relative path. This document assumes a relative path will be used, with the library location in a 'shared_libraries' subdirectory manually created in pcores, so create a 'shared_libraries' subdirectory in pcores. 2. Create the peripheral as normal within XPS, ensuring that standard VHDL templates are created by XPS. 3. Once it is created, open an instance of ISE, and open the ISE project associated with the peripheral.
The ISE project file will be at pcores/<peripheral_name>/devl/projnav. It has a '.xise' extension. 4. Create the VHDL package (assuming it does not already exist).
Right click in the design pane and select New source, then select VHDL Package, and name it 'constants'.
The 'Add to project' box should be selected.
By default, the new package file will be at devl/projnav/constants.vhd.
This is not a good location for a shared package, so manually move the file to the desired shared location, in this case it will be moved to pcores/shared_libraries/constants.vhd.
It can now be deleted from the original devl/projnav directory.
5. Open the pcores/shared_libraries/constants.vhd file, and add a constant as described in the file.
In this example we insert the following line into the 'package constants is' area, as directed by the comments in the template: constant TEST_CONSTANT_LIBRARY : integer := 16; This package file can be closed now, and we will reference the new constant in a peripheral, and in a test bench used by the peripheral. 6. Open the user_logic.vhdl file, and add the required library clauses.
The clauses would normally be near the top of the file, immediately below the 'LIBRARY ieee' clause and the associated 'USE' clauses which follow.
Assuming the library and package names are as described above, the clauses will be: LIBRARY shared_libraries; USE shared_libraries.constants.all; The constant can be used in the file. In this example, we simply want to show that the constant is accessible, so we will use it to select a bit in a typical peripheral read-back register.
One example usage is shown here, where the constant is used to select a bit out of slave register 1 when slave register 0 is being read: SLAVE_REG_READ_PROC : process( slv_reg_read_sel, slv_reg0, slv_reg1, slv_reg2, slv_dac_data ) is begin case slv_reg_read_sel is when "100" => slv_ip2bus_data <= slv_reg1(TEST_CONSTANT_LIBRARY) &slv_reg0(30 downto 0); This code will neither synthesize nor simulate unless the shared library is working, so it will be our test. 7. In the peripheral project, click on the 'Libraries' tab.
Right-click in the list, and select New VHDL Library..., and enter shared_libraries as the name.
Use the button to the right of the location entry to browse to the pcores/shared_libraries directory you created earlier, and select OK, then OK again. An 'Adding Source Files' dialog will pop up by itself, and ask if you want to add the package(s) in that location to the project.
In this example, there is only one entry shown, which is for 'constants.vhd'.
If the file were for simulation only, or for synthesis only, we could limit the association, but in this example we deliberately want to use the same package for both. Select OK. Now in the ISE 'Libraries' tab for the peripheral you will see a library 'shared_libraries' listed, and it will have one package underneath it, 'constants.vhd'.
It is probably shown with no path, so right click on the entry, select File Path Display and then Relative Paths.
The entry will now appear as ..\..\..\shared_libraries\constants.vhd . 8. The library is now accessible to the peripheral.
Assuming you already have created a testbench with a uut of user_logic, you should now be able to select the Design tab in ISE, then click on the testbench, and in the Processes below, double-click Behavioral Check Syntax.
In the Console window you should see an entry included similar to 'Parsing VHDL file ... shared_libraries/constants ... Note: If you have not previously created a testbench for an XPS peripheral, you may not be aware that you need to include the necessary libraries for the peripheral in your testbench file.
These files are all in library 'work' in a typical ISE project, but they by default they are in a separate library in the peripheral.
On the 'Libraries' tab in ISE you will see a library that has the same name as the peripheral you created, including the version number and letter.
Typically there are two packages shown in the library, <peripheral_name>.vhd, and user_logic.vhd.
These are the actual files that implement the peripheral logic, so you need to add a reference to them in the testbench because the testbench only looks in 'work' by default.
The clauses that need to be added to your testbench will be similar to these, depending of course on your peripheral name: LIBRARY sqbd_mdac_a_v1_00_a; use sqbd_mdac_a_v1_00_a.all; 9. Confirm that ISIM is able to use the shared library by double-clicking 'Simulate Behavioral Model'. There should not be any errors associated with a missing library or unresolved constant reference.
Note that the constants file could also be used in the testbench itself, by including the same lines as in the logic, in this example: LIBRARY shared_libraries; USE shared_libraries.constants.all; 10. The peripheral project now recognizes the new library, and can access the constant. However, if you close the peripheral project and open the overall project in ISE, synthesis will fail on library errors.
Similarly, if you go into XPS and attempt to generate a netlist (which invokes platgen anyway), it will also fail. This is because the XPS processor project does not automatically pick up the library references from the peripheral - the required library references must be manually added into the PAO (Peripheral Analyze Order) file. There is one PAO file for each peripheral, and it is located in the <peripheral_name>/data directory. It is named <peripheral_name).pao (In both cases the <peripheral_name> includes the full version number, not just the name you gave it, so if you create another version, you must manually re-edit the PAO file.) An example of the line ('shared_libraries') that needs to be added is shown below. The other entries shown are similar to the default entries that will already be in the file from the Create and Import Peripheral (CIP) wizard. As this file determines the order of analysis, the position in the file usually matters a great deal. In the case of something common, such as constants that do not depend on any other file, the new file will need to be the first file in the list (or at least before the file that requires them): lib shared_libraries ../../../shared_libraries/constants.vhd
# New line for shared constants, placed first in file # Remaining auto-generated lines follow and are left untouched: lib proc_common_v3_00_a all lib axi_lite_ipif_v1_01_a all lib sqbd_mdac_a_v1_00_a user_logic vhdl lib sqbd_mdac_a_v1_00_a sqbd_mdac_a vhdl
11. The project should now synthesize, either by synthesizing the top in ISE, or by using Generate Netlist in XPS.
Was this Answer Record helpful?
EDK - 13.2