AR# 43709: AXI Bridge for PCI Express - The GUI does not allow C_AXIBAR2PCIEBAR_# to accept 64-bit address values
AR# 43709
AXI Bridge for PCI Express - The GUI does not allow C_AXIBAR2PCIEBAR_# to accept 64-bit address values
Description
Version Found: 1.00.a Version Resolved and other Known Issues: see (Xilinx Answer 44969)
The C_AXIBAR2PCIEBAR_# attribute allows you to translate an AXI address to a 64-bit outgoing TLP address. When the C_AXIBAR_AS_# checkbox is selected, the C_AXIBAR2PCIEBAR_# field should accept a 64-bit address, but instead it currently only allows for a 32-bit address.
Solution
This is a known issue with the IP. The current work-around is to modify C_AXIBAR2PCIEBAR_# in the MHS file.
Revision History 11/27/2011 - Initial Release
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AR# 43709
Date
11/30/2011
Status
Active
Type
General Article
IP
AXI PCI Express (PCIe)
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