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AR# 43850

Virtex-6 FPGA ML628 Characterization Kit - Interface Test Designs

Description

I am attempting to exercise the interfaces on the Virtex-6 FPGA ML628 Characterization Kit.

What tests can be run to ensure that the interfaces are working correctly?

Solution

Virtex-6 FPGA ML628 Characterization Kit Documentation and Reference Designs referenced below can be found on the ML628 Support page.


Feature Test Design Notes
ML628
Configuration Interfaces
Configuration ADDRESS Pins ML628 User Guide (UG771) ML628 Reference Design (RDF0116)
Configuration System ACE ML628 User Guide (UG771) ML628 Reference Design (RDF0116)
Configuration JTAG Interface ML628 User Guide (UG771) ML628 Reference Design (RDF0116)
Board Feature Interfaces
Board USB Serial UART ML628 User Guide (UG771) ML628 Reference Design (RDF0116)
Board FMC-HPC Connectors XM105 User Guide (UG537) Page 29. This is the User Guide for the XM105 mezzanine debug card. This card has DS5, DS6, and DS7 which indicate good power to the board.
Debug strategies will vary depending on the specific mezzanine card being used. Can also use XTP091
Board System Monitor Interface
Board I2C Interface ML628 User Guide (UG771) ML628 Reference Design (RDF0116). The FPGA controls SuperClock2 over I2C
Board Power Monitoring Interface (TI PMBus) (Xilinx Answer 37561) Requires the TI USB EVM Adapter; See (Xilinx Answer 54022)
Board Oscillator (200 MHz, differential) ML628 User Guide (UG771) The reference designs use this clock. If they work, this clock is functional
Board Single-Ended SMA Clock Input none available These are completely user-driven clock. A good test would be loop back or monitoring differential I/O on a scope
Board Differential SMA Clock Input none available These are completely user-drive differential clocks. It might be possible to modify an example design to use these instead of the socketed oscillator
Board SuperClock-2 Module ML628 User Guide (UG771) ML628 Reference Design (RDF0116)
Transceiver Interfaces
Transceiver GTX connection (pads) ML628 User Guide (UG771) ML628 Reference Design (RDF0116)
Transceiver GTH connection (pads) ML628 User Guide (UG771) ML628 Reference Design (RDF0116)
User Specified Interfaces
User I/O header none available A simple shunt jumper loopback test could be used
User LEDs ML628 User Guide (UG771) ML628 Reference Design (RDF0116)
User DIP switches none available The existing LED test could be modified to illuminate the LED when the DIP switch is exercised
User PushButtons none available The existing LED test could be modified to illuminate the LED when the pushbutton is exercised

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
43748 Xilinx Boards and Kits - Debug Assistant N/A N/A
AR# 43850
Date Created 09/14/2011
Last Updated 01/21/2014
Status Active
Type General Article
Boards & Kits
  • Virtex-6 FPGA ML628 Characterization Kit