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AR# 43940

13.4 PlanAhead - DRC gives a error if HSTL_I_DCI output is used without VRN/PRP


If HSTL_I_DCI is used for a output in a Virtex-6 device, and VRN and PRP pins are not used for it, 13.2 PlanAhead DRC gives an error as follows:

"I/O Bank 12 (Standard) contains ports that use Digitally Controlled Impedance--for example dout[6](HSTL_I_DCI). In order to use DCI standards in a bank that is not configured as slave bank in a DCI cascade, reference resistors in the bank must be connected to VRN and VRP pins. However, the following VRN/VRP sites are occupied and can't be used to supply the necessary resistance: site AG32 (occupied by port dout[6]), site AG31 (occupied by port dout[7]). Free up VRN/VRP sites or create an appropriate DCI_CASCADE UCF constraint."

This error does not appear in 13.1.


The device does not have the VRP/VRN as the Virtex-6 FPGA SelectIO Resources User Guide describes (Page 23 of UG361):

Some DCI standards do not require connecting the external reference resistors to the VRP/VRN pins. When these DCI-based I/O standards are the only ones in a bank, the VRP and VRN pins in that bank can be used as general-purpose I/O.
DCI outputs that do not require reference resistors on VRP/VRN:


This check has been corrected in the PlanAhead 14.1 tool.
AR# 43940
Date 11/07/2012
Status Active
Type Known Issues
  • PlanAhead - 13.2
  • PlanAhead - 13.3
  • PlanAhead - 13.4
  • ??????
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