We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 44146

13.2 System Generator for DSP - Why is there no output from Viterbi v7.0 in Simulink simulation?


I am using the Xilinx System Generator for DSP design tool to build a hardware core using the Viterbi Decoder 7.0 block, but all of the outputs are always NAN (even the data valid signal).

I also do not see any output on the WaveScope window (for example).

What am I missing?


Viterbi v7.0 requires a valid license to run Simulink simulations. 

You can obtain an evaluation license from the Viterbi product page:


Click Evaluate on the left of the page.

For System Generator for DSP Release Notes for other versions, see (Xilinx Answer 29595).

Linked Answer Records

Associated Answer Records

AR# 44146
Date 06/05/2018
Status Active
Type Known Issues
  • System Generator for DSP
  • Viterbi Decoder
Page Bookmarked