AR# 44146


13.2 System Generator for DSP - Why is there no output from Viterbi v7.0 in Simulink simulation?


I am using the Xilinx System Generator for DSP design tool to build a hardware core using the Viterbi Decoder 7.0 block, but all of the outputs are always NAN (even the data valid signal).

I also do not see any output on the WaveScope window (for example).

What am I missing?


Viterbi v7.0 requires a valid license to run Simulink simulations. 

You can obtain an evaluation license from the Viterbi product page:

Click Evaluate on the left of the page.

For System Generator for DSP Release Notes for other versions, see (Xilinx Answer 29595).

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AR# 44146
Date 06/05/2018
Status Active
Type Known Issues
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