Description

Solution

To target -2l speed grade devices, youcan generate the design targeting a -2 speed grade in MIG, and, then change the speed grade to -2L in all the implementation files or in your ISE Design Suite project. The required files to modify are listed below:

• Script file ise_flow.bat/.sh
• CORE GeneratorChipScope XCO files
  • icon5_cg.xco, ila384_8_cg.xco, vio_async_in256_cg.xco and vio_sync_out72_cg.xco for DDR3 SDRAM
  • icon3_cg.xco, ila256_8_cg.xco and vio_async_in256_sync_out72_cg.xco
• xst_options.txt
• set_ise_prop.tcl

-2L support is scheduled for the MIG v1.4 ISE 13.4 release.

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