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AR# 44522

XST - "ERROR:HDLCompiler:1824 only trireg nets can have a charge strength specification" Beginning in ISE 13.3 Software

Description

Beginning with the 13.3 software release, XST will now issue an error message, namely, "ERROR:HDLCompiler:1824" for those cases where charge strength specifications are applied to non-trireg nets.

Solution

Example:

---

module top (a, b, out);
input a, b;
output out;
wire (small) out = a & b;
endmodule

---

The above example will now issue the following error:

ERROR:HDLCompiler:1824 - "top.v" Line 4: Only trireg nets can have a charge strength specification

XST no longer allows you to specify charge strength for a wire, reg, or other data types with the exception of trireg nets. In this example, a charge strength of small is specified on net out, which is an invalid capacitance specification that causes the compiler to error out.

AR# 44522
Date Created 10/14/2011
Last Updated 05/26/2014
Status Archive
Type General Article
Tools
  • ISE Design Suite - 13.3