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AR# 44651

Vivado Constraints - Why use set_clock_groups


How and why should I use set_clock_groups?


The use of set_clock_groups informs the system of the relationship between specific clock domains.  

By default, the clock domains are all synchronous and related to each other.  

If your design has clock domains that are asynchronous to each other, then you need to use the set_clock_groups command.

For example:

set_clock_groups -asynchronous \
-group {clkA PLL1_c0 PLL1_c1 } \
-group {clkB PLL2_c0 PLL2_c1 } \
-group {dsp_clk PLL3_c0 PLL3_c1 PLL3_c2 }
This has the same effect as a set_false_path constraint between the clocks in the first group to the clocks in the second two groups, and between the second two groups (i.e. all clocks in a group are asynchronous to the clocks in another group).

This syntax is easier and more efficient than 66 individual set_false_path constraints between the clock domains.

Notes on using this constraint:

  • Copy the clock names from the report_clocks command and paste them into the .xdc.
    Then it is just a matter of formatting them into this command, and making sure all of the clock names are spelled correctly.
  • Be careful of the escape character at the end of each line.
    If there is a space or tab after it, you will not see it, but the escape character will just escape that space or tab and not the end of line.
    The next line will be considered a new, unrecognizable command and it will cause an error.
  • Any clocks not in this command are related to all clocks.
    So, if you add another output called PLL2_c3 and forget to add it to this command, it will be related to all of the clocks.
  • You can have as many groups as you want. You can also have multiple set_clock_groups assignments.
  • A clock cannot appear in more than one group in a single set_clock_group constraint.
  • The -asynchronous command could also be -exclusive. This says that the clocks are mutually exclusive (only one will be running at a time) as opposed to being asynchronous. 
  • There is a special syntax where one -group is used. Basically it means cut the clocks from this group to any other clocks in the design, similar to the following:
set_clock_groups -asynchronous -group {xilinx_jtag_tck}
set_clock_groups -asynchronous -group {clkA PLL1_c0 PLL1_c1 }
set_clock_groups -asynchronous -group {clkB PLL2_c0 PLL2_c1 }
set_clock_groups -asynchronous -group {dsp_clk PLL3_c0 PLL3_c1 PLL3_c2}
  • In general, it is recommended to add all clocks to the group. Exceptions are:

1) DDR and GXB designs, where there are a large number of clocks added to the design that the user does not know about. 

95% of these clocks have paths only to domains that are relevant or are cut in the .xdc files that get created, so they do not need to be taken into consideration.

2) Virtual clocks are recommended for all I/O interfaces (except for source-synch outputs). 

Virtual clocks are not added here because the only paths they connect to are I/O's that are explicitly designated and they tend to only have real paths. 

If they are added, it will not cause any issues.

Refer to (UG903) Vivado Design Suite User Guide: Using Constraints for more information.

AR# 44651
Date 01/12/2015
Status Active
Type General Article
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