Using the Xilinx Alliance Series 1.5 Design Manager I am going to be going into Mentor's QuickHDL simulator. What Simulation Program Template Option do I choose in order to provide the proper VHDL netlist to QuickHDL?
Solution
In the Xilinx Alliance Series 1.5 Design Manager you can use on of two choices in the Simulation Program Option Template:
1) Generic VHDL
2) Modelsim VHDL
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AR# 4500
Date
10/05/2008
Status
Archive
Type
General Article
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