2. Support
  3. AR# 4523: M1.5, HPUX 10.20: /lib/dld.sl: Unresolved symbol: [Vtable]key:__dt__21__versioned_type_infoFv (data) from $XILINX/bin/hp/libbasut.sl
  4. AR# 45236: PlanAhead - "FPGA Features and Design" tab and its related IPs are missing in the IP catalog for Spartan-3 devices

AR# 45236

PlanAhead - "FPGA Features and Design" tab and its related IPs are missing in the IP catalog for Spartan-3 devices

Description

If Spartan-3 devices are selected in the 13.3PlanAhead tool, the "FPGA Features and Design" tab is missingunder the IP catalog. This tab consists ofClocking Wizard and other IP-related FPGA features.

Solution

The Clocking and Architecture wizards for Spartan-3 devices are not available through the PlanAhead tool.

These IP cores can be generated in Project Navigator or in the CORE Generator software (standalone), and then added as source files to thePlanAhead project.

AR# 45236
Date 12/15/2012
Status Archive
Type General Article
Devices More Less
Tools