AR# 4535: 1.5 HITOP- hi429 - Cannot apply TIMESPEC on what seems to be a valid timespec
1.5 HITOP- hi429 - Cannot apply TIMESPEC on what seems to be a valid timespec
Keywords: hi429, 9500xl, TIMESPEC
General Description: Even though the timespec has a valid path or group, the fitter may issue this warning: WARNING: hi429 - Cannot apply TIMESPEC TS_ADDR_TO_A1_CS = MAXDELAY:FROM:ADDR:TO:A1_CS:10.000000 nS because of one of the following: (a) a signal name was not found; (b) a signal was removed or renamed due to optimization; (c) there is no path between the FROM node and TO node in the TIMESPEC.
The original TIMESPEC from the constraints editor looks like, for example:
NET "A1_CSB_" TNM = "A1_CS"; TIMEGRP "ADDR" = PADS("ADDR<*>"); TIMESPEC "TS_ADDR_TO_A1_CS" = FROM "ADDR" TO "A1_CS" 10.000000 ns;
If it is added in the design.ucf as shown below, it works:
TIMESPEC "TS_ADDR_TO_A_CS" = FROM PADS(ADDR*) TO PADS(A1_CSB_) 10.000000 ns;
The "" around the signal qualifier "ADDR<*>", i.e. TIMEGRP "ADDR" = PADS("ADDR<*>") should be "ADDR" = PADS(ADDR<*>). The workaround is to remove the "" around the signal qualifier.
This is fixed in the 3.1i version of the Xilinx CPLD Fitting Software.