Description

In ChipScope Pro analyzer, when you select to configure the FPGA, there is an option to also import a ".cdc" file which is used to automatically populate the trigger/data port signal names.If a ".cdc" file generated from the CORE Generator software is used, the following error message occurs:

"Not a Design-level CDC signal import file"

Solution

If you are using ChipScope analyzer, there are two types of ".cdc" files:

• CORE Generator software (CoreGen) generated ".cdc"
• System level ".cdc" (generated from Inserter or the PlanAhead tool)

If you want to import a ".cdc" file along with configuring the FPGA, you can only do this with system level ".cdc" files generated from the Inserter or PlanAhead tool. The CORE Generator software generated ".cdc" file cannot be used in this case. If you want to import the CORE Generator software generated ".cdc" file, use the Import option under the File menu after the FPGA has already been configured.