AR# 45678: LogiCORE IP Initiator, Target v4.16 for PCI - When using NT machine, implement.bat may not be generated
LogiCORE IP Initiator, Target v4.16 for PCI - When using NT machine, implement.bat may not be generated
When generating the PCI core on an NT machine, the implement.bat file may not be produced in the implement directory.
To work around this issue, another machine (Win7 or Linux) can be used to generate the core. Also, an example implement.bat is included here. This script assumes the generated core's name is pci32_v4_16. You will need to modify the script as necessary to match your generated core's name.
rem Clean up the results directory rmdir /S /Q results mkdir results
rem Synthesize the Verilog wrapper files echo Synthesizing Verilog example design with XST xst -ifn xst.scr copy pci32_v4_16_top.ngc results/
rem Copy the netlist generated by Coregen echo Copying files from the netlist directory to the results directory copy ../../pci32_v4_16.ngc results/
rem Copy the constraints file generated by Coregen echo Copying files from constraints directory to results directory copy ../example_design/pci32_v4_16_top.ucf results/