UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 45730

System Generator for DSP v13.4 - The TREADY is always present on the System Generator GUI but is optional on the Convolutional Encoder v8.0 CoreGen IP. How should this flag be set?

Description

For System Generator for DSP v13.4,  the TREADY is always present on the System Generator GUI but is optional on the Convolutional Encoder v8.0 CORE Generator IP. 

How should this flag be set?

Solution

On the System Generator GUI for Convolutional Encoder v8.0, the TREADY is always present but was optional on the CORE Generator GUI. 

In newer versions of the IP, the Convolution Encoder requires TREADY to always be visible for clarity of data entry with aresetn.

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
29595 Xilinx DSP Tools, System Generator for DSP, and AccelDSP Synthesis Tool - Release Notes and Known Issues N/A N/A
AR# 45730
Date Created 01/09/2012
Last Updated 08/19/2014
Status Active
Type Known Issues
Tools
  • System Generator for DSP - 13.4