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  1. Xilinx - All Programmable
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  3. AR# 45876: 13.4 - Spartan-6 - ChipScope IBERT CORE Generator Wizard will not allow full speed range

AR# 45876

13.4 - Spartan-6 - ChipScope IBERT CORE Generator Wizard will not allow full speed range

Description

In 13.4 CORE Generator, ChipScope IBERT Wizard for Spartan-6 FPGA will only allow GTP designs to be created within limited ranges. Below is a chart that lists the tools accepted values in comparison to the values that are acceptable from the data sheet. The values that are specified within the data sheet can be achieved with the workaround below.

Spartan-6 Speed Grade -2
Symbol Data Sheet Speeds Gb/s Coregen Speeds Gb/s
FGTPRANGE1 1.88 to 2.7 2.45 to 2.5
FGTPRANGE2 0.94 to 1.62 1.22 to 1.62
FGTPRANGE3 0.6 to 0.81 0.614 to 0.81

Spartan-6 Speed Grade -3N
Symbol Data Sheet Speeds Gb/s Coregen Speeds Gb/s
FGTPRANGE1 1.88 to 3.2 2.45 to 3.125
FGTPRANGE2 0.94 to 1.62 1.22 to 1.62
FGTPRANGE3 0.6 to 0.81 0.614 to 0.81

Spartan-6 Speed Grade -3
Symbol Data Sheet Speeds Gb/s Coregen Speeds Gb/s
FGTPRANGE1 1.88 to 3.2 2.45 to 3.125
FGTPRANGE2 0.94 to 1.62 1.22 to 1.62
FGTPRANGE3 0.6 to 0.81 0.614 to 0.81

Solution

The current workaround is to generate a design with a speed that is supported in the CORE Generator IBERT wizard. Use the values in column on the right when generating a design. After the design is created, the divider settings can be changed in the IBERT GUI to a speed that is specified in the data sheet. These speeds are listed above in the column labeled "Data Sheet Speeds Gb/s."
AR# 45876
Date 05/19/2012
Status Active
Type Known Issues
Devices
  • Spartan-6 LXT
Tools
  • ChipScope Pro - 13.4