Design Advisory Answer Records are created for issues that are important to designs currently in progress and are selected to be included in the Xilinx Alert Notification System.
This Design Advisory covers theLogiCORE IPAXI VDMACore.
For a list of all current Release Notes and Known Issues for Xilinx Solutions for AXI VDMA, refer to the IP Release Notes Guide:
http://www.xilinx.com/support/documentation/ip_documentation/xtp025.pdf
Design Advisories Alerted on February 13, 2012:
02/10/2012 - (Xilinx Answer 46044) Design Advisory for LogiCORE IPAXI VDMA- Incorrect TIG Propagation in EDK
To update your Xilinx Alert Notification Preferences, please go to:
http://www.xilinx.com/support/myalerts
Revision History
02/10/2012 - Initial Release
Answer Number | Answer Title | Version Found | Version Resolved |
---|---|---|---|
46044 | Design Advisory for LogiCORE IP AXI VDMA - Incorrect TIG Propagation in EDK | N/A | N/A |
Answer Number | Answer Title | Version Found | Version Resolved |
---|---|---|---|
46044 | Design Advisory for LogiCORE IP AXI VDMA - Incorrect TIG Propagation in EDK | N/A | N/A |
AR# 46117 | |
---|---|
Date | 10/18/2012 |
Status | Archive |
Type | Design Advisory |
IP |