Description

When a design contains some Partial Reconfiguration modules, is it still possible to place logic from the Static module into the Partial Reconfiguration areas?

Solution

1. It is outside of the area group defined by the Pblock (unless forced inside with a LOC constraint),
   And
2. It does not contain dynamic elements such as block RAM, Distributed (LUT) RAM, or SRLs.
    

• Global Clock Buffers, Regional Clock Buffers, and Clock Modifying Blocks must be in static logic.
• Device feature blocks must be in static logic, for example: BSCAN, CAPTURE, DCIRESET, FRAME_ECC,ICAP, KEY_CLEAR, STARTUP, USR_ACCESS
• All I/Os must reside in static logic.
• High speed transceivers must remain in the static Partition.

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