AR# 46336

iMPACT - Why are Spartan-6 FPGA eFuse operations limited to 1.5 MHz?

Description

Why are Spartan-6 FPGA eFuse operations limited to 1.5 MHz from software release 12.1 forward?

If I have programmed eFuse with a higher frequency in a previous release, can I rely on the programming?

Solution

The Spartan-6 FPGA Data Sheet (DS162) specifies TDNACLKF is 2 MHz (max). This specification applies to read of the eFuse in all modes, JTAG, and other.eFuse read might fail if run at faster than 2 MHz.However, if after programming the read data is correct, then you know the circuits passed the data correctly to the eFuse for programming. The critical parameters are programming current and pulse times. If you have successfully verified youreFuse keys at programming time, you can rely on the programmed values.

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AR# 46336
Date	12/15/2012
Status	Active
Type	General Article
Devices	Spartan-6 LX Spartan-6 LXT
Tools	ISE Design Suite - 11.2 ISE Design Suite - 11.3 ISE Design Suite - 11.4 More ISE Design Suite - 11.5 ISE Design Suite - 12.1 ISE Design Suite - 12.2 ISE Design Suite - 12.3 ISE Design Suite - 12.4 ISE Design Suite - 13.1 ISE Design Suite - 13.2 ISE Design Suite - 13.3 ISE Design Suite - 13.4 Less

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AR# 46336

iMPACT - Why are Spartan-6 FPGA eFuse operations limited to 1.5 MHz?

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