UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!
  1. Xilinx - Adaptable. Intelligent.
  2. Support
  3. AR# 46359: FIFO Generator - Built-In FIFO is not supported in Spartan architectures, only in Virtex architectures

AR# 46359

FIFO Generator - Built-In FIFO is not supported in Spartan architectures, only in Virtex architectures

Description

When using Spartan-6 architectures, it is not possible to use Built-In FIFO implementation in the FIFO Generator GUI.

The feature is grayed out.

This option is available for all Virtex families but not for Spartan-6, why is this the case?

Solution

This is because Spartan-6 does not have a built-in FIFO primitive. 

It is only available on Virtex-4, Virtex-5 and Virtex-6.

This information is contained in the Datasheet for the core.

AR# 46359
Date 09/10/2014
Status Active
Type General Article
Devices
  • Spartan-6 LX
  • Spartan-6 LXT
  • Spartan-6Q
IP
  • FIFO Generator
Page Bookmarked