AR# 46892


IBERT Design Assistant - How does pre/post emphasis affect a high speed serial interface?


Inside Xilinx high speed transceivers, are pre and post emphasis options which can be tuned for a specific interface. How does pre and post emphasis work and how does it affect the SI on the board?

Note: This Answer Record is a part of the Xilinx ChipScope Solution Center (Xilinx Answer 45310). The Xilinx ChipScope Solution Center is available to address all questions related to the ChipScope tool. Whether you are starting a new design with the ChipScope tool or troubleshooting a problem, use the ChipScope Solution Center to guide you to the right information.


The pre- and post-emphasis attributeshelp to open up the data eye at the down stream device. When transmitting data at high speeds across long cables, the signal integrity of the interface can degrade to a point where data recovery becomes impossible. Adjusting pre- and post-emphasis can help to open up the data eye to allow for data recovery.

The Virtex-4 MGT Users Guide (UG076: contains a good discussion onthe effects of pre and post emphasis in detail. Please refer to the "Output Swing and Emphasis" section of UG076 for more information.

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
45310 Xilinx ChipScope Solution Center N/A N/A

Associated Answer Records

Answer Number Answer Title Version Found Version Resolved
46142 IBERT Design Assistant - Using IBERT to optimize transceiver settings to a particular board configuration N/A N/A
AR# 46892
Date 12/15/2012
Status Active
Type General Article
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