Note: This article is not a comprehensive lesson in transmission line theory.
It will discuss some of the basics that need to be considered when selecting terminations and what to look for when issues are encountered.
The information provided is to assist customers in designing their interfaces.
Xilinx recommends that customer perform simulations and verifications of their systems to ensure that they function to their requirements.
Termination is a method of reducing or eliminating unwanted reflections on a transmission line.
Reflections can cause multiple issues. For example:
Cross-talk is where a signal on one transmission line affects another signal on a different transmission line, usually due to capacitive, inductive, or conductive coupling between the lines.
Factors to consider when considering terminations are the I/O Standard, Drive Strength, Slew Rate, and Noise Margin.
Each Xilinx device family's SelectIO supports many types of I/O Standards. For more information on I/O Standards, see (Xilinx Answer 47368).
Each I/O standard has signal requirements and termination recommendations. Each family's SelectIO User Guide is a brilliant source of information on termination recommendations.
These recommendations come from the I/O Standard specification.
For a quick explanation of the different types of termination used for the different types of IOSTANDARDs, see (Xilinx Answer 47497).
Some I/O Standards have Drive Strength and Slew Rate Attributes. Drive strength is defined as how much current load an output can drive while maintaining valid logic levels.
Slew rate is the rate of change of the output. To determine which I/O Standards you can set the Drive Strength and Slew Rate Attributes for, see the family SelectIO User Guide.
Noise Margin is discussed in the SSO section of the SelectIO Design Assistant. See (Xilinx Answer 44394).
Decisions on terminations will need to be made around the following:
These decisions can only be made by you. Obviously Xilinx strongly recommends that you terminate your transmission lines.
From Virtex-II onwards the Virtex families have supported on chip termination in the form of DCI (Digitally controlled Impedance).
(Xilinx Answer 11814) details the DCI error tolerance for Virtex-II/-II Pro.
For details on how to set up on-chip terminations in software, see (Xilinx Answer 47449).
For assistance in debugging issues with on-chip terminations, see (Xilinx Answer 47504).