UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!
Page Bookmarked
  1. Xilinx - All Programmable
  2. Support
  3. AR# 47226: XST does not support asymmetric RAMs for port widths that are non power of 2

AR# 47226

XST does not support asymmetric RAMs for port widths that are non power of 2

Description

Does XST support asymmetric RAMs for port widths that arenot power of 2?

Solution

No. XSTdoes notsupport asymmetric RAMs for port widths that are not power of 2. XST will not pack asymmetric RAMs that are non-power of 2 into a block RAM.

XST does support asymmetric RAMs with data widths 9, 18, or 36. The XST user guide will be updated with reference to this update in 14.2.

AR# 47226
Date 07/26/2012
Status Active
Type Known Issues
Tools
  • ISE Design Suite