Tables 2-11, 2-12, and 2-13, of the LogiCORE IP Video Deinterlacer Product Guide v1.0 (PG017), documents that the buffer addressing and the number of bits that are to be used is dependent on the selected memory interface.
For a detailed list of LogiCORE IP Video Deinterlacer Release Notes and Known Issues, see (Xilinx Answer 41969).
| Answer Number | Answer Title | Version Found | Version Resolved |
|---|---|---|---|
| 41969 | LogiCORE IP Video Deinterlacer - Release Notes and Known Issues | N/A | N/A |
| AR# 47227 | |
|---|---|
| Date | 10/23/2013 |
| Status | Active |
| Type | General Article |
| IP |
|