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  3. AR# 47227: LogiCORE IP Video Deinterlacer v1.0 (Documentation) - Are all 32 bits in Tables 2-11, 2-12, and 2-13 used, or are some of them reserved?

AR# 47227

LogiCORE IP Video Deinterlacer v1.0 (Documentation) - Are all 32 bits in Tables 2-11, 2-12, and 2-13 used, or are some of them reserved?

Description

Are all 32 bits in Tables 2-11, 2-12, and 2-13 used, or are some of them reserved?

Solution

Tables 2-11, 2-12, and 2-13, of the LogiCORE IP Video Deinterlacer Product Guide v1.0 (PG017), documents that the buffer addressing and the number of bits that are to be used is dependent on the selected memory interface.

  • AXI-VDMA - Bits 31-0 are valid
  • VFBC/MPMC - Bits 30-0 are valid, Bit 31 is reserved

For a detailed list of LogiCORE IP Video Deinterlacer Release Notes and Known Issues, see (Xilinx Answer 41969).

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
41969 LogiCORE IP Video Deinterlacer - Release Notes and Known Issues N/A N/A
AR# 47227
Date 10/23/2013
Status Active
Type General Article
IP
  • Video Deinterlacer
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