We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 47328

7 Series GTX/GTH Transceivers - Loopback mode known limitations


This Answer Record contains known limitations to the usage of Loopbacks in 7 Series devices.


NE PCS (LOOPBACK[2:0]="001")

The RXBUFFER cannot be bypassed.
The RXBUFFER is used to compensate for the phase mismatch between TX and RX side.

NE PMA (LOOPBACK[2:0]="010")

No known limitations.

A GTRXRESET is required after entering and exiting Near-end PMA loopback. 

FE PCS (LOOPBACK[2:0]="110")

TX and RX must be synchronous - RXUSRCLK and TXUSRCLK must come from the same source.

FE PMA (LOOPBACK[2:0]="100")

The TXBUFFER cannot be bypassed.
The TXBUFFER is used to compensate for the phase mismatch between the RX and TX side.

A GTTXRESET is required after entering and exiting Far-end PMA loopback.

AR# 47328
Date 07/30/2014
Status Active
Type General Article
  • Kintex-7
  • Virtex-7
  • CPRI
Page Bookmarked