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AR# 47362

Virtex-6 FPGA Embedded Tri-mode Ethernet MAC Wrapper v1.6 - Release Notes and Known Issues for ISE Design Suite 14.1

Description

This answer record contains the Release Notes for the Virtex-6 FPGA LogiCORE Embedded Tri-mode Ethernet MAC Wrapper v1.6, which was released in ISE Design Suite 14.1, and includes the following:
  • General Information
  • New Features
  • Supported Devices
  • Resolved Issues
  • Known Issues
For installation instructions, general CORE Generator known issues, and design tools requirements, see the IP Release Notes Guide: http://www.xilinx.com/support/documentation/ip_documentation/xtp025.pdf.

Solution

General Information

  • Supports automatic generation of HDL wrapper files for the Virtex-6 FPGA Tri-Mode Ethernet MAC
  • Instantiates user-configurable Ethernet MAC physical interfaces (GMII, MII, RGMII, SGMII, and 1000Base-X PCS/PMA configurations are supported)
  • Provides a FIFO-based example design
  • Provides a demonstration testbench for the selected configuration
  • (Xilinx Answer 33593) Virtex-6 FPGA Embedded Tri-mode Ethernet MAC Wrapper - Frequently Asked Questions (FAQ)
  • (Xilinx Answer 38279) Ethernet IP Solution Center
New Features
  • ISE 14.1 design tools support

Supported Devices

  • Virtex-6 XC CXT/LXT/SXT/HXT
  • Virtex-6 XQ LXT/SXT
  • Virtex-6 -1L XC LXT/SXT
Resolved Issues
  • (Xilinx Answer 39960) Virtex-6 FPGA Embedded Tri-mode Ethernet MAC - Synopsys VCS back-annotated timing simulations time out

Known Issues

  • (Xilinx Answer 33195) Virtex-6 FPGA Embedded Tri-mode Ethernet MAC Wrapper - Adjusting IDELAYs to meet GMII and RGMII setup and hold requirements
  • (Xilinx Answer 43338) Virtex-4/Virtex-5/Virtex-6 FPGA Embedded Tri-mode Ethernet MAC Wrapper - Configured for MII, GMII, or RGMII operation at 10 Mbps, MDIO transactions errors can occur
  • (Xilinx Answer 47364) Virtex-6 FPGA Embedded Tri-mode Ethernet MAC Wrapper - Example Design Simulation Timeout using Modelsim 10.1a
  • (Xilinx Answer 52484) Virtex-6 Embedded TEMAC Wrapper - The RAMB36E1 address [15] should be tied High
AR# 47362
Date Created 04/20/2012
Last Updated 12/19/2012
Status Active
Type General Article
IP
  • Virtex-6 FPGA Embedded Tri-mode Ethernet MAC Wrapper