ODDR2 in Sparant-6 has a generic parameter called: INIT, which sets up the initial value for the ODDR2 output.
If you initialize the output to one (INIT => '1'), in the Behavioral and post-Translate process this parameter remains correct.
However, when the design is Mapped, the INIT parameter is changed to '0'.
This can be seen by examining the implementation in FPGA Editor, and checking the SRINIT_OQ property of the corresponding ODDR2.
This problem is fixed for ISE 14.6.
To work around this issue in earlier revisions, manually edit this parameter in the FPGA Editor.