Description

This answer record highlights the important requirements and known issues for the Virtex-7 XC7V690T (Initial ES) CES9937 devices related to software and IP. Additional silicon limitations might exist, so reference the errata that accompanies the devices.

Solution

Software Requirements

• Vivado 2012.1/ISE 14.1 or later design tools available on the Xilinx Download Center, are required for use of Virtex-7 XC7V690T (Initial ES) CES9937 devices.
• Please refer to the erratta which accompanies the devices for addtional information
• There is no support for Virtex-7 XC7V690T (Initial ES) CES9937 devices beyond Vivado 2012.4/ISE 14.4

Software Known Issues

General Software Known Issues

• (Xilinx Answer 47816) 7 Series - ISE 14.x/Vivado 2012.x Design Suite Known Issues Related to 7 Series FPGA

IP Requirements

All 7 series IP cores are listed as Pre-Production in the CORE Generator "Status" field. Support of Pre-Production cores on IES FPGA devices is dependent on Xilinx hardware validation, which is ongoing throughout the ES period. IP that has been hardware validated is still subject to change as verification and characterization work continues. Consult the IP Known Issues Answer Records below for the most recent information.

IP Known Issues

• 7 series Gen3 Integrated Block for PCI Express
• Supported versions for the Gen3 PCI Express core are v1.1 and later
• (Xilinx Answer 47441) Virtex-7 FPGA Gen3 Integrated Block for PCI Express - Release Notes and Known Issues for All Versions
• 7 series Integrated Block for PCI Express (Gen2 and Gen1)
• Supported versions for Gen 2/1 PCI Express core are v1.4 and later
• (Xilinx Answer 40469) 7 Series Integrated Block for PCI Express - Release Notes and Known Issues for All Versions
• MIG 7 series - DDR3 SDRAM, DDR2 SDRAM, QDR II, RLDRAM II, RLDRAM III
• Supported version for the MIG core are 1.5 and late
• (Xilinx Answer 45195) MIG 7 Series - Release Notes and Known Issues for All Releases 
• ChipScope Pro / Vivado Logic Debug
• (Xilinx Answer 47769)14.x ChipScope Pro and 2012.x Vivado Debug - Known Issues for the 14.x ChipScope Pro and 2012.x Vivado Debug tools
• ChipScope IBERT / Vivado Serial IO Debug
• Choose IES from the drop-down men
• (Xilinx Answer 47769)14.x ChipScope Pro and 2012.x Vivado Debug - Known Issues for the 14.x ChipScope Pro and 2012.x Vivado Debug tools

• GTH Transceivers

• Supported versions for the GTH wizard are v2.1 and v2.2
• (Xilinx Answer 46048) 7 Series FPGA Transceivers Wizard - Which silicon revisions are supported by different Wizard or ISE/Vivado tool versions?
• (Xilinx Answer 47128) Design Advisory for the Virtex-7 FPGA GTH Transceiver - Attribute Updates and Use Modes for Initial Engineering Sample (ES) Silicon

Revision History

03/13/2013 - Updates for IES only. Moved GES information to (Xilinx Answer 54906)
10/05/2012 - Updates for GES
05/02/2012 - Initial release