AR# 47504


SelectIO Design Assistant - Debug hardware issue with on-chip termination


This Answer record covers how to debug hardware issues with on-chip termination.


When debugging an issue with termination, its a good step to take a oscilloscope shot of the signal. 

The following should be kept in mind:

1)Take the measurement as close to the receiver as possible, ensuring that it is after the receiver termination

2) When scoping a signal that has on-chip termination at the pin of the package, remember that this is before the termination and the signal will look like the line is unterminated. 

This is not what the signal will look like at the die. A useful step is to simulate the design at the pin and then at the die. Then compare the signal at the pin with the scope shot.

For example LVDS input with DIFF_TERM=TRUE at the pin:

At the die (after the termination):

Even when external termination is used, the package effect can show as dips/reflections at the pin, but is correct at the die (green = at die, pink = at pin).


  • VRN and VRP: Ensure that resistors are connected and are placed on the correct bank or that DCI cascade is setup correctly.
    VRN should be connected to VCCO (not VCC or VCCAUX). VRP should be connected to GND.
  • If the I/Os that are experiencing issues are dual purpose configuration pins, see (Xilinx Answer 14887).
  • When scoping a differential signal, use a differential probe.
  • Another useful debug step is to turn off the other adjacent I/O's switching.
    If the signals are clean without adjacent signals switching, it points to a crosstalk issue.

Linked Answer Records

Master Answer Records

Associated Answer Records

Answer Number Answer Title Version Found Version Resolved
47225 SelectIO Design Assistant - How to Terminate a Transmission Line N/A N/A
AR# 47504
Date 06/02/2017
Status Active
Type General Article
People Also Viewed