Impact: | Minor, see Work-around Details paragraphs. |
Work-around: | Do not enable self-refresh clock stop mode or manually control the clock. |
Configurations Affected: | Systems using the PS DDR controller in DDR3 mode with self-refresh. |
Device Revision(s) Affected: | Refer to (Xilinx Answer 47916) - Zynq-7000 Design Advisory Master Answer Record |
Answer Number | Answer Title | Version Found | Version Resolved |
---|---|---|---|
53051 | Zynq-7000 SoC - PS DDR Controller | N/A | N/A |
AR# 47514 | |
---|---|
Date | 05/23/2018 |
Status | Active |
Type | Design Advisory |
Devices |