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AR# 47545

Zynq-7000 AP SoC, Timers - Global Timer can send Two Interrupts for the Same Event

Description

The Global Timer in single-shot mode can generate two end-of-count interrupt requests instead of one. This can be avoided by using the auto-increment mode. Software can work around the issue by clearing the Global Timer flag after having incremented the Comparator register value.

Solution

Impact: Minor. The issue creates spurious interrupt requests in the system.
Work-around: Use auto-increment instead of single-shot mode or perform a special sequence in the interrupt service routine. See Work-around Details below for more information.
Configurations Affected Systems that use the PS Global Timer (GT) in single-shot mode.
Device Revision(s) Affected: Refer to (Xilinx Answer 47916) - Zynq-7000 AP SoC Silicon Revision Differences.


The Global Timer (GT) can be programmed to generate an interrupt request to the processor when it reaches a given programmed value. Due to this issue, when the Global Timer is programmed to not use the auto-increment feature, it might generate two interrupt requests instead of a single one.

The Global Timer Control register is programmed with the following settings:

Bit 3 = 1b0 GT is programmed in single-shot mode
Bit 2 = 1b1 GT IRQ generation is enabled
Bit 1 = 1b1 GT value comparison with Comparator registers is enabled
Bit 0 = 1b1 GT count is enabled


With these settings, an IRQ is generated to the processor when the Global Timer value reaches the value programmed in the Comparator registers. The Interrupt Handler then performs the following sequence:

  • Read the ICCIAR (Interrupt Acknowledge) register
  • Clear the Global Timer flag
  • Modify the comparator value, to set it to a higher value
  • Write the ICCEOIR (End of Interrupt) register

Under these conditions, the Global Timer might generate a second (spurious) interrupt request to the processor at the end of this Interrupt Handler sequence.

Work-around Details

Because the issue only happens when the Global Timer is programmed in single-shot mode (i.e., when it does not use the auto-increment feature), a first possible work-around is to program the Global Timer to use the auto-increment feature.

If this solution is not possible, a second work-around is to modify the Interrupt Handler to avoid the offending sequence. This is achieved by clearing the Global Timer flag after having incremented the Comparator register value. The correct code sequence for the Interrupt Handler should look like the following sequence:

  • Read the ICCIAR (Interrupt Acknowledge) register
  • Modify the comparator value, to set it to a higher value
  • Clear the Global Timer flag
  • Clear the Pending Status information for Interrupt 27 (Global Timer interrupt) in the Distributor of the Interrupt Controller
  • Write the ICCEOIR (End of Interrupt) register

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
47916 Zynq-7000 AP SoC Devices - Silicon Revision Differences N/A N/A
AR# 47545
Date Created 05/24/2012
Last Updated 06/04/2013
Status Active
Type Design Advisory
Devices
  • Zynq-7000
  • Zynq-7000Q
  • XA Zynq-7000