Description

When the processor is in debug state and the sdabort flag is set, an instruction written to the ITR after an aborted Load/Store instruction is erroneously executed instead of the intended operation of being discarded. When the ITR instruction is executed, different failures can occur.

Solution

Description Details

When the processor is in debug state, an instruction written to the ITR after a Load/Store instruction that aborts gets executed on clearing the SDABORT_l, instead of being discarded. Conditions:

• Debugger has put the extDCCmode bits into Stall mode
• A previously issued load/store instruction has generated a synchronous Data Abort (e.g. an MMU fault)
• For efficiency, the debugger does not read DBGDSCRext straight away, to see if the load/store has completed and has not aborted, but writes further instructions to the ITR, expecting them to be discarded if there was a problem
• The debugger reads the DBGDSCR at the end of the sequence and discovers the load/store aborted.
• The debugger clears the SDABORT_l flag (by writing to the Clear Sticky Aborts bit in DBGDRCR)

Under the above conditions, the instruction that follows in the ITR may get executed instead of being discarded.

Impact Details

The impact is minor. Different failures can happen due to the instruction being executed when it should not. In most cases, it is expected that the failure will not cause any significant issue.

Work-around Details

There is a selection of work-arounds with increasing complexity and decreasing impact. In each case the impact is a loss of performance when debugging:

• Do not use stall mode.
• Do not use stall mode when doing load/store operations.
• Always check for a sticky abort after issuing a load/store operation in stall mode (the cost of this probably means (2) is a preferred alternative).
• Always check for a sticky abort after issuing a load/store operation in stall mode before issuing any further instructions that may corrupt important target state (such as further load/store instructions, instructions that write to live registers [VFP, CP15, etc.]).