AR# 47593

Zynq-7000 SoC, Boot - During NOR Boot the MIO 2 and MIO 14 pins are Inadvertently Configured by the BootROM

Description

In NOR Boot mode, MIO 2 and MIO 14 are configured by the BootROM. These pins are not used by the SRAM/NOR interface. MIO 2 is configured as an output and MIO 14 as an input. In a successful boot, these MIO configurations are maintained until changed by FSBL or some other later process.

Solution

Impact: Minor. MIO 14 is set as an input and it is ignored during BootROM execution, therefore there is no harmful effect. MIO 2 will be driven to both 0 and 1 states during BootROM execution.

Work-around: There is no work-around. If using NOR boot mode, the board design should use MIO 2 for purposes that can tolerate this pin being driven during BootROM execution.

Configurations Affected: Systems that utilize NOR Boot mode and use MIO 2.

Device Revision(s) Affected: Refer to (Xilinx Answer 47916) - Zynq-7000 Design Advisory Master Answer Record.

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Linked Answer Records

Master Answer Records

Answer Number	Answer Title	Version Found	Version Resolved
52538	Zynq-7000 SoC - Boot and Configuration	N/A	N/A

AR# 47593
Date	05/25/2018
Status	Active
Type	Design Advisory
Devices	Zynq-7000

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