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  1. Xilinx - All Programmable
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  3. AR# 47613: Virtex-7 FPGA Gen3 Integrated Block for PCI Express v1.1 (Vivado 2012.1) - XSIM flow Support

AR# 47613

Virtex-7 FPGA Gen3 Integrated Block for PCI Express v1.1 (Vivado 2012.1) - XSIM flow Support

Description

Version Found: v1.1
Version Resolved and other Known Issues: See (Xilinx Answer 47441)

The simulation of a design with Virtex-7 FPGA Gen3 Integrated Block for PCI Express v1.1 core is not supported with XSIM flow.

Solution

The default XSIM tool flow is not supported with Vivado 2012.1. Users must manually add the IP DSPORT testbench files to the project to simulate with the example testbench. This is a known issue and will be fixed in a future release of the core.


Revision History
05/08/2012 - Initial Release

Note: "Version Found" refers to the version the problem was first discovered. The problem may also exist in earlier versions, but no specific testing has been performed to verify earlier versions.

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
47441 Virtex-7 FPGA Gen3 Integrated Block for PCI Express - Release Notes and Known Issues for All Versions up to Vivado 2012.4 and ISE 14.7 N/A N/A
AR# 47613
Date 06/28/2012
Status Active
Type Known Issues
IP
  • Virtex-7 FPGA Gen3 Integrated Block for PCI Express (PCIe)