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AR# 47655: AXI Virtual FIFO Controller - Release Notes and Known Issues
AXI Virtual FIFO Controller - Release Notes and Known Issues
This Release Note and Known Issues Answer Record is for , and contains the following information:
The AXI Virtual FIFO Controller is a high performance core that implements multiple AXI4-Stream FIFOs. The VFIFO core manages multiple sets of read and write address pointers to emulate the behavior of multiple independent FIFOs. The VFIFO core supports up to 8 channels witha maximum data width of 1024 and burst size of 4096 bytes. The VFIFO is useful in applications using PCIe, video, or Ethernet that require FIFOs deeper than can be otherwise constructed from on-chip Block RAM memory.
Internal timeout count increased
Extra output port added to indicate the channel idle
For installation instructions, general CORE Generator known issues, and design tools requirements, see the IP Release Notes Guide (XTP025).
This table correlates the core version to the first IDS software release version in which it was included.