Version Found: v1.1
Version Resolved and other Known Issues: See (Xilinx Answer 47441)
The ARI Capable Hierarchy bit in the SR-IOV control register is incorrectly reset by a function level reset of the physical function.
NOTE: "Version Found" refers to the version the problem was first discovered. The problem might also exist in earlier versions, but no specific testing has been performed to verify earlier versions.
Revision History
05/08/2012 - Initial release
| Answer Number | Answer Title | Version Found | Version Resolved |
|---|---|---|---|
| 47441 | Virtex-7 FPGA Gen3 Integrated Block for PCI Express - Release Notes and Known Issues for All Versions up to Vivado 2012.4 and ISE 14.7 | N/A | N/A |
| AR# 47671 | |
|---|---|
| Date | 05/20/2012 |
| Status | Active |
| Type | Known Issues |
| IP |
|