Description

Solution

The Gigabit Ethernet Controller in Zynq-7000 SoC supports the following PHY modes:

• RGMII v2.0 through the MIO interface
• GMII through the EMIO interface

Other PHY interfaces can be implemented by using appropriate shim logic in the PL. Currently available shim cores are as follows:

• MII to RMII; see the Reduced Media Independent Interface (RMII) page for more information.
• GMII to RGMII; see the GMII to RGMII (https://www.xilinx.com/content/xilinx/en/products/intellectual-property/gmii-to-rgmii.html) page for more information.
• GMII to SGMII/SGMII over LVDS/1000 Base-X; see the Ethernet 1000 Base-X PCS/PMA or SGMII (https://www.xilinx.com/content/xilinx/en/products/intellectual-property/do-di-gmiito1gbsxpcs.html) page for more information.

Linked Answer Records

Master Answer Records