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AR# 47864

Zynq-7000 AP SoC ZC702 Evaluation Kit - Known Issues and Release Notes Master Answer Record

Description

This answer record lists all known issues with the Zynq-7000 SoC ZC702 Evaluation Kit.

Solution

To identify the silicon on your ZC702, please see (Xilinx Answer 37579).

To begin debugging a suspected hardware issue on the ZC702, see (Xilinx Answer 54012) Zynq-7000 AP SoC ZC702 Evaluation Kit - Board Debug Checklist.

To view the Design Advisories associated with the ZC702, see (Xilinx Answer 53708) Design Advisory Master Answer Record for Zynq-7000 All Programmable SoC ZC702 Evaluation Kit.

The ZC702 Board Debug Checklist and ZC702 Design Advisory Master Answer Record form part of (Xilinx Answer 43745) Xilinx Boards and Kits Solution Center is available to address all questions related to Xilinx Boards and Kits.

Known Issues

Board and Kit Related Issues

(Xilinx Answer 50664) 14.1 Zynq - PL power-off support (independent from PS) on the ZC702 board
(Xilinx Answer 50650) ZC702 - The SD card might need to be re-imaged in order to boot
(Xilinx Answer 50875) Zynq-7000 SoC ZC702 Evaluation Kit - Why does my board not have the SW16 switch as shown in the User Guide?
(Xilinx Answer 51248)Zynq-7000 - What QSPI Clock mode/speed is supported on the ZC702?
(Xilinx Answer 51333) Zynq-7000 EPP ZC702 Evaluation Kit - Battery B2 missing on some kits
(Xilinx Answer 51438) ZC702 - PG signal does not assert by default
(Xilinx Answer 51753) ZC702 - Temporary Deviation of QSPI PROM Devices on Revision 1.0 Evaluation Boards
(Xilinx Answer 52184) Zynq-7000 AP SoC ZC702 Evaluation Kit - How does SW16 correlate to jumpers J20, J21, J22, J25, and J26?
(Xilinx Answer 52252) Zynq-7000 AP SoC ZC702 Evaluation Kit TRD - Why is my 1080p60 input not being detected when using the Avnet IMAGEON FMC daughter card with the 14.1 or 14.2 TRD design?
(Xilinx Answer 52941) Zynq-7000 AP SoC Base Targeted Reference Design - Release Notes and Known Issues Master Answer Record
(Xilinx Answer 53615) Zynq-7000 AP SoC ZC702 Evaluation Kit - INIT LED unexpectedly goes red
(Xilinx Answer 53737) Zynq-7000 AP SoC ZC702 Evaluation Kit - Rev 1.1 - USB drive no longer provided in the box
(Xilinx Answer 54022) How can I order TI USB Interface Adapter EVM from Texas Instruments?
(Xilinx Answer 55805) Xilinx Evaluation Kits - Board becomes non-operational when TI USB Interface EVM is attached
(Xilinx Answer 56516) Zynq-7000 AP SOC ZC702 Evaluation Kit - Use of Monitors that do not support 1080p / 720p video resolutions with Zynq Base TRD
(Xilinx Answer 56811) Xilinx Evaluation Kits - How do I reprogram the TI power controllers on my board to the factory defaults?
(Xilinx Answer 59747) Zynq-7000 AP SoC ZC702 Evaluation Kit - PCB Revision Differences
(Xilinx Answer 60253) Zynq-7000 AP SoC Video and Imaging Kit - Yellow effect on image
(Xilinx Answer 61849) 6 series and 7 series Xilinx Evaluation Kits - Known Issues and Release Notes Master Answer Record for the Texas Instruments Power Solution
(Xilinx Answer 66509) 7 Series and UltraScale Kits - Interaction with ADI AD9625-2.5EBZ FMC card
(Xilinx Answer 67507)Xilinx Boards and Kits - Power Supply Information


Documentation Related Issues

Answer RecordTitleVersion FoundVersion Resolved
(Xilinx Answer 51110)ZC702 - XADC_VCC5V0 jumper setting to enable Analog Mixed Signal evaluationUG926 v1.2; UG850 v1.0; UG886 v1.0UG926 v3.0.1; UG850 v1.1; UG886 v1.1
(Xilinx Answer 51220)ZC702 - Master UCF (Rev 1.0) shows incorrect IOSTANDARD for USRCLK_N / _PRev 1.0Rev 2.0
(Xilinx Answer 51774)ZC702 Evaluation Board for the Zynq-7000 XC7Z020 AP SoC User Guide v1.0 (UG850) - UCD9248 Designators Incorrectv1.0v1.1
(Xilinx Answer 52321)Zynq-7000 ZC702 Getting Started Guide (UG926) - Default Jumper and Switch Settingsv1.2.1v4.0
(Xilinx Answer 52563)ZC702 Evaluation Board for the Zynq-7000 XC7Z020 AP SoC User Guide v1.1 (UG850) - Marvel 88E1111 device or Marvel 88E1116R device on this board?v1.1v1.2
(Xilinx Answer 52705)ZC702 Evaluation Board for the Zynq-7000 XC7Z020 AP SoC User Guide v1.1 (UG850) - HDMI_D Connectionsv1.1v1.2
(Xilinx Answer 52937)ZC702 Evaluation Board for the Zynq-7000 XC7Z020 AP SoC User Guide v1.1 (UG850) - SPI part number correction
v1.1v1.2
(Xilinx Answer 53060)ZC702 Evaluation Board for the Zynq-7000 XC7Z020 AP SoC User Guide v1.0 (UG850) - SiT9102 Oscillator frequency stability incorrectv1.0v1.1
(Xilinx Answer 53067)Zynq-7000 AP SoC ZC702 Evaluation Kit - Board Temperature Specificationsv1.1v1.2
(Xilinx Answer 54188)Zynq-7000 AP SoC ZC702 Evaluation Kit - UG850 (v1.1) VCC12_P_IN LED is DS14v1.1v1.2
(Xilinx Answer 56320)Zynq-7000 AP SoC ZC702 Evaluation Kit - UG850 (v1.1) Master UCF listing shows SYSCLK_N and SYSCLK_P as LVDS not LVDS_25v1.1v1.2
(Xilinx Answer 58912)Boards and Kits - Board files blocked on xilinx.com
(Xilinx Answer 63568)UG850 (v1.3) ZC702 Board User Guide - Table 1-29 - What is the pin listing for FMC2_LPC_CLK1_M2C_P / N?v1.3

Silicon Related Issues
(Xilinx Answer 47915)Design Advisory Master Answer Record for Zynq-7000 AP SoC Devices

PCI Express Related Issues

None

Design Tools Related Issues

(Xilinx Answer 51235) Zynq-7000 14.1/14.2 - Xilinx QSPI Programming tools (SDK and iMPACT) supports external loopback capable designs
(Xilinx Answer 52143) 14.x Zynq-7000 SoC AP Impact - QSPI programming on the ZC702 (7020 rev1.0 silicon) requires the board to be in QSPI mode
(Xilinx Answer 55931) Xilinx Evaluation Kits - What type of license is shipped with Xilinx Evaluation Kits?
(Xilinx Answer 60358) 2014.1 lwIP designs for ZC702 and ZC706 - both designs fail to return pings.

Useful Information

Third Party Debug Tool Information

(Xilinx Answer 46881) Zynq-7000 - How to set up a third-party debug environment on the ZC702 board
(Xilinx Answer 47767) Zynq-7000, ZC702 - Lauterbach Startup Script

Reference Design Information

(Xilinx Answer 46880) Zynq-7000 Example Design - Linear QSPI Performance (Max Effective Throughput)
(Xilinx Answer 46915) Zynq-7000 Example Design - Setup the TRACE port via EMIO on the ZC702 board
(Xilinx Answer 50572) Zynq-7000 Example Design - Interrupt handling of PL generated interrupt

AMS101 Information

(Xilinx Answer 51214) AMS101 - Information on establishing a connection to the GUI

 

Linked Answer Records

Child Answer Records

Answer Number Answer Title Version Found Version Resolved
67507 Xilinx Boards and Kits - Power Supply Information N/A N/A
AR# 47864
Date Created 05/11/2012
Last Updated 07/08/2016
Status Active
Type Known Issues
Devices
  • Zynq-7000
Boards & Kits
  • Zynq-7000 All Programmable SoC ZC702 Evaluation Kit