This section of the MIG Design Assistant focuses on the ZQ Calibration defined by the JEDEC Specification, as it applies to the MIG 7 Series FPGA DDR3 designs.
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ZQ Calibration Commands are required to calibrate the DRAM ODT and Ron values. The DRAM requires a longer time to perform this calibration during initialization (ZQCL) and a shorter period of time after initialization (ZQCS). The MIG 7 Series design includes both ZQ Short (ZQCS) and ZQ Long (ZQCL) Calibration commands that adhere to the DDR3 JEDEC Standard. The ZQ Calibration Command is discussed in section 5.5 of JEDEC Specification JESD79-3 DDR3 SDRAM Standard.
User requested ZQCS command
In place of the automated timer ZQ Short Calibration command, the user design can send explicitly the command at convenient timing. The assertion of app_zq_req issues one ZQCS command. Thereturn ofapp_zq_ack acknowledges the command was issued. Using this command while the DDR bus is idle can optimize the bandwidth and read/write timing.
9/7/2012 - Initial Release