The Master UCF is generated with generic IOSTANDARDs initially.
It is then updated with the correct IOSTANDARDs associated with particular pins.
The Master UCF file is not associated with any bitstream, but rather a reference to check what IOSTANDARDs certain pins should be constrained to.
It provides a template for designs targeting the VC707 board.
AK34 and AL34 are USER_CLOCK_P and USER_CLOCK_N respectively.
They receive a differential clock signal from the Si570 oscillator on the VC707, and so should be constrained as LVDS pins.
In the VC707 Master UCF file (Rev 1.0), referenced in UG885 (v1.0) VC707 Evaluation Board for the Virtex-7 FPGA User Guide, Appendix D, AK34 and AL34 are listed as LVCMOS18 pins.
This is an error in the Master UCF file - the default for these pins on the board should be LVDS.
This has been fixed in VC707 Master UCF (Rev 2.0) and has been fixed in UG885 (v1.1).
Using the Si570 Programming Design Files for the VC707 sets AK34 and AL34 correctly as LVDS in the UCF file.
For designs where the Si570 is used to provide a differential clock to the FPGA, you will need to ensure that your UCF reflects the correct IOSTANDARD of LVDS for AK34 and AL34.