AR# 50332: 13.3 Timing - Incorrect Clock path analysis under PERIOD constraint between GTP and MCB CE input
13.3 Timing - Incorrect Clock path analysis under PERIOD constraint between GTP and MCB CE input
In the timing report, a clock path from GTP clock output to MCB CE input is analyzed under Period constraint and gives a setup error. This is a clock path and no requirement is needed on this path. How do I resolve this issue?
This path should not be analyzed. This issue has been fixed in ISE Design Suite 13.4. To avoid this issue in ISE versions prior to 13.4, add TIG constraint in UCF like the following.
# The following constraints is taking the above path as an example. User needs to do necessary changes to apply to his own design.
inst serdes_if/tile0_serdes_if_i/gtpa1_dual_i TNM = GTP_grp; inst top_rtl/ddr_if/memc3_wrapper_inst/mcb_ui_top_inst/mcb_raw_wrapper_inst/samc_0 TNM = MCB_grp; net top_rtl/ddr_if/c3_pll_ce_90 TPTHRU = thru_point; TIMESPEC TS_GTP2MCB_TIG = FROM GTP_grp THRU thru_point TO MCB_grp TIG;