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AR# 50436

14.1 PlanAhead - JTAG Chain Error During MAP

Description

If attempting to create a simple design in the PlanAhead tool using two MicroBlaze cores, the following error is received:

[PhysDesignRules 1683] Unsupported programming for BSCAN block and JTAG_CHAIN attribute value 1. The BSCAN component MB_One_i/debug_module/debug_module/Use_Virtex6.BSCAN_VIRTEX6_I has placement which requires the JTAG_CHAIN attribute to be set to the value 2. The JTAG_CHAIN attribute must be changed or the programming for the BSCAN block must be moved to a location corresponding to the JTAG_CHAIN attribute setting.

Solution

This error occurs because both MicroBlaze MDM modules have the same JTAG_CHAIN parameter. Both MDM modules cannot be located in the same position on JTAG.

The fix this issue, perform the following:

  1. Change the values of the C_JTAG_CHAIN parameter to different values and save the .mhs.
    For example, in file MB_One.mhs:

    BEGIN mdm
    PARAMETER INSTANCE = debug_module
    PARAMETER HW_VER = 2.00.b
    PARAMETER C_INTERCONNECT = 2
    PARAMETER C_USE_UART = 1
    PARAMETER C_JTAG_CHAIN = 1
    PARAMETER C_BASEADDR = 0x41400000
    PARAMETER C_HIGHADDR = 0x4140ffff
    BUS_INTERFACE S_AXI = axi4lite_0
    BUS_INTERFACE MBDEBUG_0 = microblaze_0_debug
    PORT Debug_SYS_Rst = proc_sys_reset_0_MB_Debug_Sys_Rst
    PORT S_AXI_ACLK = clk_100_0000MHz
    END

    In file MB_Two.mhs:

    BEGIN mdm
    PARAMETER INSTANCE = debug_module
    PARAMETER HW_VER = 2.00.b
    PARAMETER C_INTERCONNECT = 2
    PARAMETER C_USE_UART = 1
    PARAMETER C_JTAG_CHAIN = 2
    PARAMETER C_BASEADDR = 0x41400000
    PARAMETER C_HIGHADDR = 0x4140ffff
    BUS_INTERFACE S_AXI = axi4lite_0
    BUS_INTERFACE MBDEBUG_0 = microblaze_0_debug
    PORT Debug_SYS_Rst = proc_sys_reset_0_MB_Debug_Sys_Rst
    PORT S_AXI_ACLK = clk_100_0000MHz
    END
AR# 50436
Date Created 02/13/2013
Last Updated 02/13/2013
Status Active
Type General Article
Devices
  • FPGA Device Families
Tools
  • EDK
  • PlanAhead