AR# 50549


MIG 7 Series DDR3L - Can a DDR3L part operate with 1.5V VDD and achieve the maximum rated 7 series performance for DDR3 as specified in the data sheet?


The 7 Series DC and Switching Characteristics Data Sheets specifies different "Maximum Physical Interface (PHY) Rates" for DDR3 and DDR3L.

Is it possible to achieve the higher rates specified for DDR3 using VDD=1.5V with a DDR3L part?

NOTE: This answer record is part of the Xilinx MIG Solution Center (Xilinx Answer 34243). The Xilinx MIG Solution Center is available to address all questions related to MIG. Whether you are starting a new design with MIG or troubleshooting a problem, use the MIG Solution Center to guide you to the right information.


In order to achieve the maximum DDR3 ratings, you must work with the memory vendor to ensure that the part is not just tolerable at 1.5V but fully compliant to the 1.5V parts. If it is fully compliant, the DDR3 rates are possible.

Once full compliance is verified, generate the MIG design for the desired 1.35V part. Then, change the I/O Standard settings in the UCF for SSTL_15 instead of 1.35, and change the appropriate parameters for the frequency change (such as tCK,CL,CWL,PLL input frequency, M and D values, etc.). It is possible to generate a separate sample DDR3 design that runs at the desired frequency for a 1.5V part and copy over the appropiate frequency parameters to the 1.35V MIG design.

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
51705 MIG 7 Series Solution Center - Design Assistant - Performance N/A N/A
AR# 50549
Date 01/24/2013
Status Active
Type Solution Center
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