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AR# 50728

2012.2 Vivado Debug - Warning is issued when re-opening implemented design with ILA 2.0 core

Description

There is a known issue in 2012.2 Vivado where a warning message is issued when re-opening an implemented design with an ILA 2.0 core. 

The warning message is similar to the message below:

WARNING: [Common 17-254] File '/proj/dsv_xhd/radhera/Rodin/ILA2.0/ila_2_instant/project_2/project_2.runs/impl_1/.Xil/Vivado-9494-xhdl-xhdcomp1787/debug_core_hub_CV_9494-1339482891/debug_core_hub_CV.xdc' does not exists, if you create more constraints you may not be able to save design. [/proj/dsv_xhd/radhera/Rodin/ILA2.0/ila_2_instant/.Xil/Vivado-7887-xhdl-xhdcomp1787/dcp/dut_routed.xdc:4]
WARNING: [Common 17-254] File '/proj/dsv_xhd/radhera/Rodin/ILA2.0/ila_2_instant/project_2/project_2.runs/impl_1/.Xil/Vivado-9494-xhdl-xhdcomp1787/ila_1269_1339479024_CV_9494-1339483053/ila_1269_1339479024_CV.xdc' does not exists, if you create more constraints you may not be able to save design. [/proj/dsv_xhd/radhera/Rodin/ILA2.0/ila_2_instant/.Xil/Vivado-7887-xhdl-xhdcomp1787/dcp/dut_routed.xdc:4]

Solution

This warning message can be safely ignored.

The timing constraints are correctly read and the messaging is incorrect. 

This is fixed in Vivado 2012.3.
AR# 50728
Date Created 07/17/2012
Last Updated 10/20/2014
Status Active
Type Known Issues
Devices
  • Artix-7
  • Virtex-7
  • Kintex-7
Tools
  • Vivado Design Suite
IP
  • ChipScope ILA