AR# 50735: MIG 7 Series DDR3/DDR2 - vio_instr_mode_value 0x1 and 0xE do not work properly
AR# 50735
MIG 7 Series DDR3/DDR2 - vio_instr_mode_value 0x1 and 0xE do not work properly
Description
Version Found: v1.2 Version Resolved and other Known Issues: See (Xilinx Answer 45195).
The Traffic Generator does not send the expected commands when setting "vio_instr_mode_value" to 0x1 or 0xE. As defined in UG586, Table 1-13, 0x1: Command type (read/write) as defined by fixed_instr_i, and 0xE: Write only at address zero, however, read only commands will be sent.
Solution
Users are required to upgrade to the latest version of MIG if these instruction modes are required, as there is no workaround available.
Revision History 07/25/2012 - Initial release of AR