AR# 50792

Description

A number of initialization updates are needed for the Ten Gigabit Ethernet PCS/PMA v2.3 core when targeting 7 series devices.  

To get these updates, update to the Ten Gigabit Ethernet PCS/PMA v2.4 core available in ISE 14.2/Vivado 2012.2 Design Suites.

Solution

Below is a list of initialization updates added to the v2.4 core:

• In Simulation, FEC block slipcount register does not get initialized
• Block-level HDL wrapper logic update needed to remove reset deadlock when cable is pulled
• In Simulation, core_status[0] not initialized to 0
• PCS Reset was resetting the FEC error counters, should be PMA Reset
• Need to switch GT to LPM mode during AN phase
• Updated example design with latest 14.2 GTX/GTH attributes
• Block-level HDL wrapper logic update needed to delay on RXUSRRDY to allow RXCDR to lock
• Update to add a free-running counter to AN block for initializing the Nonce generator