AR# 50803: 14.2 ERROR:EDK - xget_value 69222976 value : the given handle is of type MHS. It does not have a value associated
14.2 ERROR:EDK - xget_value 69222976 value : the given handle is of type MHS. It does not have a value associated
I upgraded to ISE Design Suite 14.1 from 13.3, and after that my XPS project will not build. I see the error message on the console:
Running DRC Tcl procedures for OPTION SYSLEVEL_DRC_PROC... ERROR:EDK - xget_value 69222976 value : the given handle is of type MHS. It does not have a value associated ERROR:EDK - axi_intc_spu (axi_intc) - ERROR:EDK:440 - platgen failed with errors!
How can I work around this?
The design is routing the IRQ port on the axi_intc core to an external port in the XPS system. This is causing the DRC checks to fail.
The real problem in terms of the DRC failure is that the external port is not an "interrupt target." You can work around this by creating a custom PCORE that acts as an interrupt "bridge" from the XPS system into the user logic external to XPS. Essentially, the internal-facing port is a valid "interrupt target" and the external-facing port is a standard signal.
Please also note that even with this bridge PCORE, it will just pass the IRQ signal into the user design external to XPS. The user will not have any visibility into the translation of the IRQ into _what_ generated the signal.
This functionality will need to be added by the user.
To use the IP, unzip it into the pcore directory in your project. In XPS, select Project -> Rescan User Repositories
Once this is done, the user can add the IP from the catalog.
Note: this Pcore is to only be used as a reference. It is not supported by Xilinx