ECC needs 26 bits of DRAM width. How this is allocated is up to the user. However, the most efficient means would probably be 1x 32-bit device.
All of 1x32, 2x16, or 4X8 would work fine.
Answer Number | Answer Title | Version Found | Version Resolved |
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52540 | Zynq-7000 SoC - Frequently Asked Questions | N/A | N/A |
AR# 50898 | |
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Date | 02/04/2013 |
Status | Active |
Type | General Article |
Tools |